Company: TSL Associates
Location: San Jose, CA 95109
Type: Full Time
Experience: Experienced
Compensation: $100,000 - $180,000
Education: Bachelor of Science
Travel: None
Will Relocate: Yes
Shift: First
P: 716-751-6345

Senior Design Verification Engineers, Principal Design Verification Engineers and LEAD Design Verification Engineers

This is a great time for DV experts ! My clients are in full throttle hiring mode offering the best opportunities for career growth working on next generation products using the latest in DV tools and methodologies!


The principal positions are for you real DV Guru's who are at the top of your game! Excellent compensation package as well!

 You need to have solid skills in :

SystemVerilog/OVM, Vera, UVM or AVM

Experience in functional verification , test benches and assertions

Environments: Microprocessor, Standard Cell ASIC's , FPGA's and analog mixed signal

Other Locations: Austin TX, Huntsville AL, Tucson AZ, RTP NC, San Jose CA, Sunnyvale CA, San Diego CA, Denver CO

Are you ready for the challenge?

Please forward your resume to or confidential consideration !  call 716-751-6345

About Us

Company Name
TSL Associates
2771 Daniels Road, Wilson NY, 14172